WFI active pixel imager

Photon counting active pixel sensors (APS) are evolving from the current generation of X-ray CCD imagers. Like a CCD, an APS detects an X-ray photon, and determines its energy, by measuring the charge liberated when the photon interacts via photoelectric absorption in the detector's active volume. Unlike a CCD, an APS contains charge sensing circuitry in each pixel, and thus need not transfer the primary photocharge signal over macroscopic distances before measurement. The advantages of the APS architecture include much faster readout rates, much better radiation tolerance and significantly lower power requirements, when compared to CCDs. All of these advantages are vital to meeting Gen-X wide-field imager requirements.

An important but less obvious consequence of the higher APS readout rate is significantly better quantum efficiency at low (E < 1 keV) X-ray photon energies. This arises because observations must be designed so that at most one X-ray photon is detected in a given pixel during a single frame (exposure) period. As a result, the number of corrupting, out-of-band (usually visible) photons drops linearly as the frame time is reduced. The higher APS readout rate thus allows thinner optical blocking filters, which in turns provides better low-energy quantum efficiency.

Scientific active pixel sensors are in a early stage of development. Two basic architectures are evolving. Monolithic sensors incorporate the readout circuitry and the photosensitive volume within the same wafer [1,2]. Such devices can exploit the very small circuit elements that can be produced using modern semiconductor fabrication techniques to obtain very high low input capacitance and therefore very high responsivity low readout noise. Depending on the implementation, however, challenges remain in obtaining sufficiently thick detector volumes, or sufficiently small pixel sizes, to meet Gen-X requirements.

Cross-Section of Three-Dimensionally Integrated, Hybrid CMOS Image Sensor

An alternative sensor architecture (shown in the figure above) is the hybrid [3,4] in which the detector volume and the readout circuitry are fabricated on separate wafers which are then mated to form the detector. This approach offers greater design flexibility for the separate detector and readout circuit layers. In principle this may allow for more capable onboard processing, and even permit different materials to be used for detector and readout layers. On the other hand, to date the larger capacitance of the wafer-to-wafer electrical connections in hybrid detectors is limiting the readout noise that has been achieved.

The Generation-X technology development roadmap will establish milestones for APS sensor development. As noted above, monolithic and hybrid APS have parallel development paths in the near term. Several other development tasks, which are (nearly) independent of detctor architecture, have also been identified. Among these, the most important is the need for high-speed, low power digital processing to extract scientifically useful data from the extremely high potential raw data rate (up to 100 Mpix/fr * 1000 fr/s x 12 bits/pix).

References

1. G. Lutz, L. Andricek, R. Eckardt, O. Halker, P. Lechner, R. Richter, G. Schaller, F. Schopper, H. Soltau, L. Struder, J. Treis, S. Wolf, and C. Zhang, "DEPFET-detectors: New developments", 2007, Nuclear Instruments and Methods in Physics Research, A, 311-315.
2. J. Janesick, T. Elliott, and J. Tower, "CMOS Detectors: Scientific Monolithic CMOS Imagers Come of Age,", 2008 Laser Focus World, 44.
3. Y. Bai, J. Bajaj, J. Beletic, M. Farris, A. Joshi, S. Lauxtermann, A. Peterson, and G. Williams, "Silicon CMOS imaging technologies for x-ray, UV, visible and near infrared,", 2007 SPIE 7021.
4. V. Suntharalingam, D. Rathman, G. Prigozhin, S. Kissel, and M. Bautz, "Back-illuminated Three-Dimensionally Integrated CMOS Image Sensors for Scientific Applications," 2007 SPIE 6690.